Zachodniopomorski Uniwersytet Technologiczny w Szczecinie

Administracja Centralna Uczelni - Wymiana międzynarodowa (S1)

Sylabus przedmiotu Programmable control devices 1 – logic control systems:

Informacje podstawowe

Kierunek studiów Wymiana międzynarodowa
Forma studiów studia stacjonarne Poziom pierwszego stopnia
Tytuł zawodowy absolwenta
Obszary studiów
Profil
Moduł
Przedmiot Programmable control devices 1 – logic control systems
Specjalność przedmiot wspólny
Jednostka prowadząca Katedra Metod Sztucznej Inteligencji i Matematyki Stosowanej
Nauczyciel odpowiedzialny Sławomir Jaszczak <Slawomir.Jaszczak@zut.edu.pl>
Inni nauczyciele Sławomir Jaszczak <Slawomir.Jaszczak@zut.edu.pl>, Wojciech Sałabun <wsalabun@wi.zut.edu.pl>
ECTS (planowane) 5,0 ECTS (formy) 5,0
Forma zaliczenia zaliczenie Język angielski
Blok obieralny Grupa obieralna

Formy dydaktyczne

Forma dydaktycznaKODSemestrGodzinyECTSWagaZaliczenie
wykładyW1 15 1,50,25zaliczenie
laboratoriaL1 30 3,50,75zaliczenie

Wymagania wstępne

KODWymaganie wstępne
W-1Physics - basics of the electricity
W-2Electronics - basics of DC systems
W-3Basic knowledge of the selected programming language (C/C++, Java, Python etc.)

Cele przedmiotu

dla tego przedmiotu nie są określone cele przedmiotu

Treści programowe z podziałem na formy zajęć

KODTreść programowaGodziny
laboratoria
T-L-1Basics of the ST programming6
T-L-2Syntesis of the logic functions6
T-L-3Syntesis of the state machine12
T-L-4Programming of the selected electrical motor - DC o AC6
30
wykłady
T-W-1Introduction to programmable controllers2
T-W-2Sensors and actuators.2
T-W-3Real time operation systems1
T-W-4Basics of the Structured Text language.1
T-W-5Logic functions in the Structured Text language.2
T-W-6Timers and counters in the Structured Text language2
T-W-7Machine state syntesis in the Structured Text language.2
T-W-8Tips and tricks in the Structured Text language.2
T-W-9Exam1
15

Obciążenie pracą studenta - formy aktywności

KODForma aktywnościGodziny
laboratoria
A-L-1Participation in labs30
A-L-2Self study of the literature30
A-L-3Realization of the projects45
105
wykłady
A-W-1Participation in lectures15
A-W-2Self- study of the literature15
A-W-3Preperation to an exam15
45

Metody nauczania / narzędzia dydaktyczne

dla tego przedmiotu nie są określone metody nauczania ani narzędzia dydaktyczne

Sposoby oceny

dla tego przedmiotu nie są określone sposoby oceny

Zamierzone efekty kształcenia - wiedza

Zamierzone efekty kształceniaOdniesienie do efektów kształcenia dla kierunku studiówOdniesienie do efektów zdefiniowanych dla obszaru kształceniaCel przedmiotuTreści programoweMetody nauczaniaSposób oceny
WM-WI_1-_null_W01
General knowledge of the ST language syntax and ability of logic functions and machines state synthesis.

Zamierzone efekty kształcenia - umiejętności

Zamierzone efekty kształceniaOdniesienie do efektów kształcenia dla kierunku studiówOdniesienie do efektów zdefiniowanych dla obszaru kształceniaCel przedmiotuTreści programoweMetody nauczaniaSposób oceny
WM-WI_1-_null_U01
Ability of using general syntax of the ST language (logic functions, machines state, timers, counters, SET-RESET functions)

Kryterium oceny - wiedza

Efekt kształceniaOcenaKryterium oceny
WM-WI_1-_null_W01
General knowledge of the ST language syntax and ability of logic functions and machines state synthesis.
2,0A student isn't able to describe a logic function synthesis an its implementation in the ST language.
3,0A student is able to describe a logic function synthesis an its implementation in the ST language.
3,5A student is able to describe a logic function synthesis an its implementation in the ST language and also show and describe some practical examples.
4,0A student is able to describe a logic function synthesis an its implementation in the ST language and also show and describe some practical examples. Additionally a student is able to explain TON and TOF timer's functions.
4,5A student is able to describe a logic function synthesis an its implementation in the ST language and also show and describe some practical examples. Additionally a student is able to explain TON and TOF timer's functions and show how to use them in a given logic function to make it more useful.
5,0A student is able to describe a logic function synthesis an its implementation in the ST language and also show and describe some practical examples. Additionally a student is able to explain TON and TOF timer's functions and show how to use them in a given logic function to make it more useful. A student can describe a machine state synthesis using the SFC languuage elements.

Kryterium oceny - umiejętności

Efekt kształceniaOcenaKryterium oceny
WM-WI_1-_null_U01
Ability of using general syntax of the ST language (logic functions, machines state, timers, counters, SET-RESET functions)
2,0A student is not able to write a simple logic function using the ST language
3,0A student is able to write and comment a simple logic function using the ST language
3,5A student is able to write and comment a simple logic function using the ST language. Additionally a student is able to modify an original function to have other functionality.
4,0A student is able to write and comment a simple logic function using the ST language. Additionally a student is able to modify an original function to have other functionality. A student can freely use CASE and IF constructions in the ST language.
4,5A student is able to write and comment a simple logic function using the ST language. Additionally a student is able to modify an original function to have other functionality. A student can freely use CASE and IF constructions in the ST language and he is able to add additional conditions and modes to them.
5,0A student is able to write and comment a simple logic function using the ST language. Additionally a student is able to modify an original function to have other functionality. A student can freely use CASE and IF constructions in the ST language and he is able to add additional conditions and modes to them. A student is able to develope a state machine based on a description and elements of the ST language.

Literatura podstawowa

  1. Kelvin T. Erickson, Programmable Logic Controllers, Dogwood Valley Press, 2016
  2. B&R, Structured Text, B&R, 2017

Treści programowe - laboratoria

KODTreść programowaGodziny
T-L-1Basics of the ST programming6
T-L-2Syntesis of the logic functions6
T-L-3Syntesis of the state machine12
T-L-4Programming of the selected electrical motor - DC o AC6
30

Treści programowe - wykłady

KODTreść programowaGodziny
T-W-1Introduction to programmable controllers2
T-W-2Sensors and actuators.2
T-W-3Real time operation systems1
T-W-4Basics of the Structured Text language.1
T-W-5Logic functions in the Structured Text language.2
T-W-6Timers and counters in the Structured Text language2
T-W-7Machine state syntesis in the Structured Text language.2
T-W-8Tips and tricks in the Structured Text language.2
T-W-9Exam1
15

Formy aktywności - laboratoria

KODForma aktywnościGodziny
A-L-1Participation in labs30
A-L-2Self study of the literature30
A-L-3Realization of the projects45
105
(*) 1 punkt ECTS, odpowiada około 30 godzinom aktywności studenta

Formy aktywności - wykłady

KODForma aktywnościGodziny
A-W-1Participation in lectures15
A-W-2Self- study of the literature15
A-W-3Preperation to an exam15
45
(*) 1 punkt ECTS, odpowiada około 30 godzinom aktywności studenta
PoleKODZnaczenie kodu
Zamierzone efekty kształceniaWM-WI_1-_null_W01General knowledge of the ST language syntax and ability of logic functions and machines state synthesis.
Kryteria ocenyOcenaKryterium oceny
2,0A student isn't able to describe a logic function synthesis an its implementation in the ST language.
3,0A student is able to describe a logic function synthesis an its implementation in the ST language.
3,5A student is able to describe a logic function synthesis an its implementation in the ST language and also show and describe some practical examples.
4,0A student is able to describe a logic function synthesis an its implementation in the ST language and also show and describe some practical examples. Additionally a student is able to explain TON and TOF timer's functions.
4,5A student is able to describe a logic function synthesis an its implementation in the ST language and also show and describe some practical examples. Additionally a student is able to explain TON and TOF timer's functions and show how to use them in a given logic function to make it more useful.
5,0A student is able to describe a logic function synthesis an its implementation in the ST language and also show and describe some practical examples. Additionally a student is able to explain TON and TOF timer's functions and show how to use them in a given logic function to make it more useful. A student can describe a machine state synthesis using the SFC languuage elements.
PoleKODZnaczenie kodu
Zamierzone efekty kształceniaWM-WI_1-_null_U01Ability of using general syntax of the ST language (logic functions, machines state, timers, counters, SET-RESET functions)
Kryteria ocenyOcenaKryterium oceny
2,0A student is not able to write a simple logic function using the ST language
3,0A student is able to write and comment a simple logic function using the ST language
3,5A student is able to write and comment a simple logic function using the ST language. Additionally a student is able to modify an original function to have other functionality.
4,0A student is able to write and comment a simple logic function using the ST language. Additionally a student is able to modify an original function to have other functionality. A student can freely use CASE and IF constructions in the ST language.
4,5A student is able to write and comment a simple logic function using the ST language. Additionally a student is able to modify an original function to have other functionality. A student can freely use CASE and IF constructions in the ST language and he is able to add additional conditions and modes to them.
5,0A student is able to write and comment a simple logic function using the ST language. Additionally a student is able to modify an original function to have other functionality. A student can freely use CASE and IF constructions in the ST language and he is able to add additional conditions and modes to them. A student is able to develope a state machine based on a description and elements of the ST language.