Sylabus przedmiotu Programmable control devices 1 – logic control systems:
Informacje podstawowe
Kierunek studiów |
Wymiana międzynarodowa |
Forma studiów |
studia stacjonarne |
Poziom |
pierwszego stopnia |
Tytuł zawodowy absolwenta |
|
Obszary studiów |
— |
Profil |
|
Moduł |
— |
Przedmiot |
Programmable control devices 1 – logic control systems |
Specjalność |
przedmiot wspólny |
Jednostka prowadząca |
Katedra Metod Sztucznej Inteligencji i Matematyki Stosowanej |
Nauczyciel odpowiedzialny |
Sławomir Jaszczak <Slawomir.Jaszczak@zut.edu.pl> |
Inni nauczyciele |
Sławomir Jaszczak <Slawomir.Jaszczak@zut.edu.pl>, Wojciech Sałabun <wsalabun@wi.zut.edu.pl> |
ECTS (planowane) |
5,0 |
ECTS (formy) |
5,0 |
Forma zaliczenia |
zaliczenie |
Język |
angielski |
Blok obieralny |
— |
Grupa obieralna |
— |
Formy dydaktyczne
Forma dydaktyczna | KOD | Semestr | Godziny | ECTS | Waga | Zaliczenie |
---|
wykłady | W | 2 | 15 | 1,5 | 0,25 | zaliczenie |
laboratoria | L | 2 | 30 | 3,5 | 0,75 | zaliczenie |
Wymagania wstępne
KOD | Wymaganie wstępne |
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W-1 | Physics - basics of the electricity |
W-2 | Electronics - basics of DC systems |
W-3 | Basic knowledge of the selected programming language (C/C++, Java, Python etc.) |
Cele przedmiotu
dla tego przedmiotu nie są określone cele przedmiotuTreści programowe z podziałem na formy zajęć
KOD | Treść programowa | Godziny |
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laboratoria |
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T-L-1 | Basics of the ST programming | 6 |
T-L-2 | Syntesis of the logic functions | 6 |
T-L-3 | Syntesis of the state machine | 12 |
T-L-4 | Programming of the selected electrical motor - DC o AC | 6 |
| 30 |
---|
wykłady |
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T-W-1 | Introduction to programmable controllers | 2 |
T-W-2 | Sensors and actuators. | 2 |
T-W-3 | Real time operation systems | 1 |
T-W-4 | Basics of the Structured Text language. | 1 |
T-W-5 | Logic functions in the Structured Text language. | 2 |
T-W-6 | Timers and counters in the Structured Text language | 2 |
T-W-7 | Machine state syntesis in the Structured Text language. | 2 |
T-W-8 | Tips and tricks in the Structured Text language. | 2 |
T-W-9 | Exam | 1 |
| 15 |
---|
Obciążenie pracą studenta - formy aktywności
KOD | Forma aktywności | Godziny |
---|
laboratoria |
---|
A-L-1 | Participation in labs | 30 |
A-L-2 | Self study of the literature | 30 |
A-L-3 | Realization of the projects | 45 |
| 105 |
---|
wykłady |
---|
A-W-1 | Participation in lectures | 15 |
A-W-2 | Self- study of the literature | 15 |
A-W-3 | Preperation to an exam | 15 |
| 45 |
---|
Metody nauczania / narzędzia dydaktyczne
dla tego przedmiotu nie są określone metody nauczania ani narzędzia dydaktyczneSposoby oceny
dla tego przedmiotu nie są określone sposoby ocenyZamierzone efekty kształcenia - wiedza
Zamierzone efekty kształcenia | Odniesienie do efektów kształcenia dla kierunku studiów | Odniesienie do efektów zdefiniowanych dla obszaru kształcenia | Cel przedmiotu | Treści programowe | Metody nauczania | Sposób oceny |
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WM-WI_1-_null_W01 General knowledge of the ST language syntax and ability of logic functions and machines state synthesis. | — | — | — | — | — | — |
Zamierzone efekty kształcenia - umiejętności
Zamierzone efekty kształcenia | Odniesienie do efektów kształcenia dla kierunku studiów | Odniesienie do efektów zdefiniowanych dla obszaru kształcenia | Cel przedmiotu | Treści programowe | Metody nauczania | Sposób oceny |
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WM-WI_1-_null_U01 Ability of using general syntax of the ST language (logic functions, machines state, timers, counters, SET-RESET functions) | — | — | — | — | — | — |
Kryterium oceny - wiedza
Efekt kształcenia | Ocena | Kryterium oceny |
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WM-WI_1-_null_W01 General knowledge of the ST language syntax and ability of logic functions and machines state synthesis. | 2,0 | A student isn't able to describe a logic function synthesis an its implementation in the ST language. |
3,0 | A student is able to describe a logic function synthesis an its implementation in the ST language. |
3,5 | A student is able to describe a logic function synthesis an its implementation in the ST language and also show and describe some practical examples. |
4,0 | A student is able to describe a logic function synthesis an its implementation in the ST language and also show and describe some practical examples. Additionally a student is able to explain TON and TOF timer's functions. |
4,5 | A student is able to describe a logic function synthesis an its implementation in the ST language and also show and describe some practical examples. Additionally a student is able to explain TON and TOF timer's functions and show how to use them in a given logic function to make it more useful. |
5,0 | A student is able to describe a logic function synthesis an its implementation in the ST language and also show and describe some practical examples. Additionally a student is able to explain TON and TOF timer's functions and show how to use them in a given logic function to make it more useful.
A student can describe a machine state synthesis using the SFC languuage elements. |
Kryterium oceny - umiejętności
Efekt kształcenia | Ocena | Kryterium oceny |
---|
WM-WI_1-_null_U01 Ability of using general syntax of the ST language (logic functions, machines state, timers, counters, SET-RESET functions) | 2,0 | A student is not able to write a simple logic function using the ST language |
3,0 | A student is able to write and comment a simple logic function using the ST language |
3,5 | A student is able to write and comment a simple logic function using the ST language. Additionally a student is able to modify an original function to have other functionality. |
4,0 | A student is able to write and comment a simple logic function using the ST language. Additionally a student is able to modify an original function to have other functionality. A student can freely use CASE and IF constructions in the ST language. |
4,5 | A student is able to write and comment a simple logic function using the ST language. Additionally a student is able to modify an original function to have other functionality. A student can freely use CASE and IF constructions in the ST language and he is able to add additional conditions and modes to them. |
5,0 | A student is able to write and comment a simple logic function using the ST language. Additionally a student is able to modify an original function to have other functionality. A student can freely use CASE and IF constructions in the ST language and he is able to add additional conditions and modes to them.
A student is able to develope a state machine based on a description and elements of the ST language. |
Literatura podstawowa
- Kelvin T. Erickson, Programmable Logic Controllers, Dogwood Valley Press, 2016
- B&R, Structured Text, B&R, 2017